Assembly Tutorials — Complete Beginner to Advanced Guide

Assembly Guide — What is Assembly? CPU Architecture and Machine Code

Assembly language is the lowest-level human-readable programming language providing direct mnemonic representation of CPU instructions for complete control over hardware.

x86-64 Architecture Guide — CPU Modes, Registers, and Instruction Set

x86-64 architecture evolved from 16-bit to 64-bit, supporting multiple operation modes, 16 general-purpose registers, and complex instruction set computing (CISC).

Assembly Guide — x86-64 Architecture and Registers

x86-64 architecture in assembly language programming uses general-purpose registers, instruction pointer, flags, and special registers for data manipulation.

Assembly Guide — Memory Addressing Modes

x86-64 memory addressing modes determine how instructions access memory using registers, displacements, and computed addresses for data manipulation.

Assembly Guide — Stack Operations and Function Calls

The x86-64 stack manages function calls, local variables, and parameter passing through push/pop operations and the RSP register.

Assembly Guide — Common Instructions and Operations

x86-64 instructions cover data movement, arithmetic, logic, control flow, and string operations for all assembly programming needs.

Assembly Guide — Conditional Execution and Branching

Assembly conditional execution uses flag-based conditional jumps and CMOV instructions for implementing if-else logic and decision making.

Assembly Guide — Loop Constructs and Iteration

Assembly loops use conditional jumps and counters to implement for, while, and do-while iteration patterns for repeated code execution.

Assembly Addressing Modes — Memory Access Patterns

Assembly addressing modes define how CPU instructions access memory through register indirect, indexed, scaled, and RIP-relative addressing for flexible data access.

Assembly Procedures — Function Calls and Calling Conventions

Assembly procedures use call/ret instructions with the stack to implement function calls following the System V AMD64 ABI calling convention.

Assembly Guide — Macro Programming for Assembly

Assembly macros provide text substitution and code generation for reducing repetitive patterns and creating domain-specific programming constructs.

Assembly Guide — Interrupts and Exceptions Handling

x86-64 interrupts and exceptions provide hardware and software event handling through interrupt descriptor tables for system calls and fault management.

Assembly System Calls — Linux Kernel Interface

Linux system calls in assembly use the syscall instruction with syscall numbers in RAX and arguments in RDI, RSI, RDX, R10, R8, R9 for kernel operations.

Assembly String Operations — rep movs, stos, scas, and lods

Assembly string instructions enable efficient block operations using rep prefixes with movs, stos, lods, and scas for copying, filling, and scanning memory.

Assembly Floating-Point — x87 FPU and SSE Math Operations

x86-64 floating-point arithmetic uses x87 FPU instructions (fld, fadd, fmul) for legacy math and SSE instructions (addss, mulss) for modern scalar float operations.

Assembly SSE — SIMD Vector Instructions for Parallel Processing

SSE (Streaming SIMD Extensions) provides packed single and double precision operations on 128-bit XMM registers for parallel data processing.

Assembly AVX — Advanced Vector Extensions for 256-bit SIMD

AVX extends SSE to 256-bit YMM registers with non-destructive 3-operand syntax, enabling 8 single-precision or 4 double-precision operations per instruction.

Assembly Multi-File Projects — Linking Multiple Object Files

Multi-file assembly projects use global/extern directives to share symbols across files, with separate compilation and linking into a single executable.

Assembly Debugging — GDB and Debugging Techniques

Debugging assembly programs with GDB enables single-stepping through instructions, inspecting registers, memory, and the stack to trace program execution.

Assembly Profiling — Measuring and Optimizing Performance

Assembly profiling uses perf, valgrind, and RDTSC to measure instruction counts, cache misses, branch mispredictions, and CPU cycles for performance optimization.

ARM64 Assembly — Introduction to AArch64 Architecture

ARM64 (AArch64) is a RISC architecture with 31 general-purpose registers, fixed 4-byte instructions, and load-store memory architecture for mobile and embedded systems.

ARM64 Instructions — Arithmetic, Logical and Shift Operations

ARM64 provides arithmetic, logical, and shift instructions with conditional execution, flexible operand options, and a uniform 4-byte encoding for all operations.

ARM64 Memory — Load-Store Architecture and Addressing

ARM64 memory access is restricted to ldr and str instructions with multiple addressing modes including base register, offset, pre-index, and post-index.

ARM64 Branches — Conditional Execution and Control Flow

ARM64 branches use b/bl/br instructions with condition codes (eq, ne, lt, gt) and conditional select instructions for branchless control flow.